Staff ChipDev Engineer

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role, you will have the opportunity to find the perfect blend of software design practices and hardware development complexity. You will be a hardware engineer with software proficiency. The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world. We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Work with partner teams to provide the compute, storage and methodology needs of the chip design, verification and physical design teams. Collaborate with application-specific integrated circuit (ASIC) teams to implement tools and methodologies. Design and implement CAD tools, solutions and methodologies for ASIC development. Create software solutions that improve the hardware design process through automation. Propose, design and implement software automation that directly addresses bottlenecks in today's ASIC and SoC EDA flow.

Minimum qualifications: Bachelor’s degree in Electrical Engineering, Computer Science, or equivalent practical experience. 12 years of experience in software development using various programming languages, algorithms, and data structures. 5 years of experience creating developer tools (such as automated systems or compilers) to enhance code health, quality, and velocity. 3 years of experience in a technical leadership role. Preferred qualifications: Experience with ASIC design, debug, and verification flows. Experience evaluating multiple vendor solutions and driving tool decisions/design improvements. Experience with design verification techniques, including constrained-random simulation, formal property verification, or static verification. Experience working with register-transfer level (RTL) teams and design integration methodologies that improve team productivity and velocity. Experience with software architectural elements across domains, including CAD, physical design, architecture, digital design, silicon validation, and design verification. Ability to resolve complex, ambiguous problems that do not have established precedents.