Package Design, Signal and Power Integrity Senior Staff Engineer

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, Marvell’s innovative technologies enable new possibilities and power the next generation of performance‑driven systems. Within this ecosystem, Marvell’s central advanced packaging organization plays a critical role in delivering next‑generation connectivity and compute products. The organization brings deep expertise in architecture, package design, and electrical performance, including SI/PI to develop advanced IC packages that support high‑speed interfaces. This work directly shapes product performance, reliability, and time‑to‑market, making it a key contributor to Marvell’s overall technology leadership. What You Can Expect Marvell’s Central Engineering team is seeking a talented High-speed IC package SI/PI design engineer to contribute to the development of advanced microelectronic packages for semiconductors supporting 448 Gb/s data rates and beyond.   This role requires an engineer who can operate independently in technically ambiguous areas, identify gaps and work towards developing improved approaches when needed.   The engineer will be responsible for package interconnect design, modeling, and characterization, power delivery, simulation methodology development and correlation with measurements.   Role will also involve working on custom high-speed interfaces where established design methodologies may not exist. The engineer will work with cross-functional team to explore new interconnect architectures, develop design rules and invent practical solutions.

MS/PhD  Electrical Engineering, Computer Engineering with relevant industry experience. Strong understanding of transmission line theory & EM fundamentals. Deep understanding of frequency and time domain analysis in high speed design. Demonstrated ability to independently solve complex SI/PI problems. Experience driving SI/PI design from architecture through implementation & validation. Experience with developing SI/PI workflows and investigating tool trade-offs. Experience in using 2-D and 3-D EM simulation tools such as Ansys HFSS, SI-Wave, Cadence Clarity Power plane design, modeling and analysis using tools like PowerSI, Siwave Working knowledge of channel & circuit simulators like ADS, Hspice. Proven track-record of investigating channel/PDN behavior systematically and establish root-cause. Experience with lab measurements and equipment such as VNA, TDR etc. Familiarity with layout tools like Allegro, APD or PADS. Strong team player with communication, presentation, and documentation skills. Highly Desired Familiarity with packaging technologies, materials, package substrate design rules and assembly rules Knowledge of the thermal and mechanical analysis of the IC package development. Experience with high-speed electronic packaging for digital and analog Ics Experience with 2.5D/3D package development. Experience with CPC/CPO connectors. Ability to automate the SI, PI and Packaging activities using scripting tools like Python. Ability to manage package development involving various cross functional teams like assembly development, IC physical layout teams, Analog and Digital designers, marketing . Expected Base Pay Range (USD) 141,150 - 211,400, $ per annum