DTCO/STCO Research Engineer– IMEC Strategic Research Partnerships

Job Description: Intel is seeking an experienced DTCO/STCO Architect to be based at IMEC in Leuven, Belgium. In this highly visible role, you will serve as the primary technical liaison between Intel and IMEC, driving Design Technology Co-Optimization (DTCO) and System Technology Co-Optimization (STCO) initiatives that shape future semiconductor technology platforms, advanced packaging solutions, and system architectures. You will work at the intersection of process technology, design enablement, advanced packaging, system architecture, and technology research. Your mission will be to ensure that Intel's long-term technology and product requirements are effectively represented within IMEC research programs while enabling rapid transfer of technical learnings, insights, and innovations back into Intel. The successful candidate will combine deep technical expertise with strong partnership and operational excellence. This role requires the ability to influence research directions, align diverse stakeholders, drive execution across organizational boundaries, and ensure strategic Intel investments at IMEC generate meaningful technical outcomes and business value.

Technology Strategy and DTCO/STCO Leadership Lead DTCO and STCO investigations that connect process technology, design enablement, packaging, architecture, and system-level requirements. Develop decision frameworks to evaluate future technology options across performance, power, area, cost, yield, manufacturability, reliability, variability, and system integration. Identify key scaling challenges, technical opportunities, and research priorities for future logic platforms and advanced packaging solutions. Ensure Intel product, foundry, architecture, and platform requirements are reflected in IMEC research activities and technology definition work. IMEC Partnership and Research Translation Serve as Intel's primary on-site technical representative at IMEC and strengthen alignment between Intel, IMEC, and strategic research partners. Influence IMEC research directions so they address Intel's critical DTCO, STCO, packaging, architecture, and system technology needs. Connect Intel domain experts with IMEC researchers to drive the right module, integration, design, packaging, and system-level investigations. Ensure timely transfer of technical learnings, methodologies, and research results from IMEC into relevant Intel organizations. Program Execution and Stakeholder Alignment Track research objectives, milestones, deliverables, risks, and dependencies to ensure Intel receives clear technical and business value from the partnership. Facilitate technical reviews, executive updates, and stakeholder alignment forums across geographically distributed teams. Escalate technical issues, schedule risks, resource gaps, and operational challenges early, with clear mitigation paths. Promote transparent communication, ownership, collaboration, and data-driven decision making across Intel-IMEC engagements. Technical Requirements Deep expertise in one or more core semiconductor technology domains, with sufficient breadth to integrate across DTCO, STCO, packaging, architecture, and system-level tradeoffs. Experience in logic technology development, process integration, advanced transistor architectures, interconnect/BEOL scaling, lithography, SRAM, standard cell architecture, design enablement, physical design, EDA workflows, advanced packaging, chiplets, power delivery, thermal/mechanical co-optimization, or related technology pathfinding areas. Ability to connect design, product, and system requirements to process technology, packaging, and platform capabilities. Strong understanding of DTCO and STCO tradeoffs across performance, power, area, cost, yield, manufacturability, reliability, variability, and system integration. Experience developing quantitative analyses and decision frameworks that guide technology choices, roadmap options, and research