ML Architect, Hardware Software Co-Design (All Levels)

About Rivian Rivian is on a mission to keep the world adventurous forever. This goes for the emissions-free Electric Adventure Vehicles we build, and the curious, courageous souls we seek to attract. As a company, we constantly challenge what’s possible, never simply accepting what has always been done. We reframe old problems, seek new solutions and operate comfortably in areas that are unknown. Our backgrounds are diverse, but our team shares a love of the outdoors and a desire to protect it for future generations.

Summary We are looking for an Research Engineer with deep expertise in quantized deep learning models for hardware acceleration in autonomous systems. In this cross-disciplinary role, you will bridge perception model design and hardware-aware deployment, enabling efficient execution of high-performance perception algorithms across embedded compute platforms. You will focus on researching state of the art perception models and develop optimization pipelines for the quantized versions of these models customized to provide real-time performance and energy efficiency on next-generation autonomy hardware.

Research state of the art perception models in collaboration with the ADAS SW teams Lead the development of optimizations for mapping quantized perception models (e.g., CNNs, Transformers, LLMs) to embedded and heterogeneous hardware platforms. Design and implement hardware-aware optimizations, including quantization strategies, model compression, memory-efficient representations, and operator fusion, targeted to custom accelerators. Collaborate with hardware teams to co-optimize model architecture and compute pipeline under real-time constraints (latency, throughput, power). Benchmark and analyze system performance across platforms and iterate to achieve optimal deployment efficiency. Partner with perception, systems, and autonomy teams to align model optimization efforts with hardware roadmap and real-world autonomy requirements.

Ph.D. or M.S. in Computer Engineering, Electrical Engineering, Computer Science, or related field with a focus on ML compilers, embedded systems, or hardware-aware AI. Hands-on experience with quantized model deployment, ML design stacks, and code generation for embedded or heterogeneous compute systems. Strong understanding of computer vision models (e.g., object detection, segmentation) and their optimization for edge inference. Proficiency in deep learning frameworks (e.g., PyTorch, TensorFlow) and their low-level IRs or export formats (e.g., ONNX). Solid programming skills in C++, Python Familiarity with CUDA/OpenCL (or other accelerator programming models).

Prior experience working with hardware-software co-design, especially for autonomous or robotics platforms. Deep knowledge of numerical precision trade-offs, quantization-aware training (QAT), and dynamic/static quantization flows. Familiarity with embedded real-time constraints and hardware profiling/debugging tools. Familiarity with rearchitecting models to best suit hardware capabilities. Publication record in top-tier ML/Systems conferences (e.g., MLSys, NeurIPS, DAC, ICCAD). Pay Disclosure Salary Range: The salary range for this role is $206,000 - $258,000. for San Francisco Bay Area based applicants. This is the lowest to highest salary we in good faith believe we would pay for this role at the time of this posting. An employee’s position within the salary range will be based on several factors including, but not limited to, specific competencies, relevant education, qualifications, certifications, experience, skills, geographic location, shift, and organizational needs. The successful candidate may be eligible for annual performance bonus and equity awards.

Summary: Rivian offers a comprehensive package of benefits for full-time and part-time employees, their spouse or domestic partner, and children up to age 26, including but not limited to paid