Sr. Staff Engineer-High Speed Interface Pre-Silicon Validation/Verification

Descriptions & Requirements

Job Description and Requirements

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent years deep in the emulation trenches, where the difference between a clean bring-up and a six-month debug spiral comes down to decisions you made in the verification plan three months earlier. You know PCIe and DDR not just as protocols but as living, breathing systems with corner cases that only reveal themselves under emulation at scale. You have used Zebu or similar platforms enough to know when to trust the model and when to dig deeper, and you have built the muscle memory to bridge what the emulation IP can do and what the design IP actually needs. You do not wait for perfect alignment between teams. You see the gap between Controller verification and PHY validation, and you build the bridge yourself. You ask the right questions, pull the right stakeholders into the room, and move the work forward without creating downstream chaos. Standards documents do not intimidate you. You read the errata, interpret the ECNs, and translate them into actionable requirements before anyone else realizes they matter. At Synopsys, you will work on IP that powers the semiconductor industry. The team is global, the problems are hard, and what you build will ship in products that matter.

Close the gap between Emulation IP capabilities and Design IP verification needs across Controller and PHY domains, ensuring seamless integration and coverage Define technical requirements for Emulation IP development, working directly with IP teams to ensure correct implementation and deployment in verification flows Track, report, and drive improvement on key emulation metrics including IP quality, coverage completeness, and verification cycle time Stay ahead of evolving PCIe and DDR standards, interpret specification changes, errata, and ECNs, and integrate those updates into emulation and design IP strategies Review and validate test plans for both Emulation IP and Design IP, ensuring traceability, feature coverage, and right-first-time product quality Collaborate cross-functionally with verification, design, and product teams across geographies to standardize methodologies and optimize emulation workflows Mentor engineers on emulation best practices, verification strategies, and advanced debugging techniques on Zebu and similar platforms The Impact You Will Have Accelerate time to market for high-performance silicon by enabling faster, more reliable pre-silicon validation cycles Drive adoption of best-in-class emulation methodologies across Synopsys IP teams, raising the bar for verification quality and efficiency Influence the next generation of Emulation IP products by defining requirements grounded in real verification use cases and customer needs Reduce post-silicon surprises by ensuring comprehensive coverage and traceability across Controller and PHY verification domains Standardize emulation workflows across global teams, improving collaboration, reuse, and compliance with organizational goals Position Synopsys as a leader in emulation-driven verification by championing innovation and continuous improvement in IP development Elevate product quality and end-customer satisfaction by bridging technical gaps and ensuring seamless integration across complex IP ecosystems What You'll Need * You have 8+ years of hands-on experience in emulation, IP verification, or ASIC digital design * You bring deep expertise in PCIe and DDR protocols, including verification strategies, corner cases, and standards compliance * You