R&D Engineering, Engineer

Descriptions & Requirements

Job Description and Requirements

We Are At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are You are passionate early-career engineer eager to make your mark in semiconductor design. With a solid academic background in electronics, electrical, or computer engineering, you have built a strong foundation in CMOS device physics and circuit behavior. You thrive in technical environments where precision matters and enjoy solving challenges related to low-power, high-performance memory circuits. You bring curiosity and analytical skills to dissect simulation results and optimize circuit performance. A sense amplifier is not just a schematic block to you, it is a carefully balanced circuit where noise margin, speed, and power compete. You are comfortable with Unix/Linux environments and possess scripting skills in Python, Perl, or Tcl. Exposure to SPICE-based simulation tools, SRAM bitcell design, or memory compiler flows is an advantage. Motivated by growth, you are open to feedback and quick to adapt to new design methodologies. You value teamwork and deliver high-quality results, as shown through your academic projects, internships, or early work in circuit design. Ready to join a technical team, you appreciate rigor, collaboration, and continuous learning, helping shape memory solutions that power AI, mobile, automotive, and networking silicon.

Design and optimize SRAM bitcells and peripheral circuits including sense amplifiers, write drivers, precharge circuits, and row/column decoders for power, performance, area, and yield. Run transistor-level simulations using SPICE-class tools to validate circuit behavior across process, voltage, and temperature corners. Perform Monte Carlo and variability analysis to ensure robust operation across manufacturing spread and aging effects. Contribute to SRAM compiler development and automation flows using scripting languages like Python, Perl, or Tcl. Debug circuit failures, analyze noise margins, and implement read/write assist techniques to improve reliability. Collaborate with layout, verification, and characterization teams to close timing, power, and area targets. Document design decisions, simulation results, and circuit methodologies for team knowledge sharing and design reuse. The Impact You Will Have Your circuits will directly determine the speed, power, and density of memory subsystems in chips used across AI, mobile, automotive, and networking markets. Optimizations you make to bitcells and peripheral circuits will translate into measurable improvements in SoC-level power and performance. Compiler enhancements you contribute to will enable faster design turnaround and higher quality memory IP for Synopsys customers. Automation scripts you develop will accelerate design iterations and free up engineering time for higher-value work. Your work will help Synopsys maintain leadership in memory IP, a foundational building block for semiconductor innovation. Technical insights you generate will inform future memory architectures and design methodologies across the team.

B.Tech or M.Tech in Electrical Engineering, Electronics Engineering, VLSI Design, Microelectronics, or a related field. 0-2 years of experience in circuit design, VLSI engineering, or memory design (internships, projects, and relevant coursework included). Demonstrated eagerness to learn new technologies, methodologies, and design techniques. Strong foundation in CMOS device physics, transistor operation, and semiconductor process technology. Understanding of SRAM architecture, bitcell design, and memory