Server Postsilicon Project Engineer
Qualcomm
- Location
- Santa Clara, California, United States of America
- Work model
- On-Site
- Level
- Staff
- H-1B history
- 22 approvals (FY2023)
- Posted
- Aug 17, 2026
About this role
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary:
Our Mission
We are dedicated to transforming the industry by reimagining silicon and developing next-generation computing platforms. By joining our team, you’ll collaborate with world-class engineers to create innovative solutions that push the limits of performance, energy efficiency, and scalability. Our focus is on developing server-class, high-performance solutions optimized for the needs of data-center products. We are seeking a highly experienced technical execution leader to drive post-silicon activities for complex server products. This role requires the candidate to develop an intimate understanding of product architecture, design, validation goals and performance, power, and thermal (PPT) optimization targets. Combined with the ability to coordinate execution across matrixed engineering organizations, this high visibility role is responsible for the successful commercialization of the product while meeting rigorous internal and external product KPIs and quality targets. The candidate will seamlessly work across IP and SoC validation, software, PPT, product test (ATE, SLT), and customer engineering teams to drive effective triage, risk management, and milestone readiness. Minimum Qualifications: • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 8+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 7+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Preferred Qualifications
10+ years of experience in silicon, systems, hardware, or server product development or commercialization. 5+ years in a technical leadership role Experience in a post-silicon technical execution role driving one or more data-center projects from initial power-on through product commercialization. Demonstrated ability to drive execution across matrixed teams and communicate technical status, risks, dependencies, and corrective actions clearly. 15+ years of experience in silicon, systems, hardware, or server product development. Experience driving the commercialization of two or more CPU server products, from initial power-on through production release. Architecture, design, or validation experience in critical functional domains such as CPU, Fabric, PCIe, CXL, or memory systems. Experience optimizing products toward power, performance, and thermal targets. Experience with silicon bring-up, validation, debug, characterization, issue triage, and production readiness reviews. Experience working with product test organizations, including ATE and SLT. Ability to correlate data from characterization, product testing, and sensitivity analysis to formulate theories for observed behaviors and failures; drive actionable plans to complete triage while simultaneously evaluating workarounds and potential fixes. Ability to leverage the experience and expertise of specialists across the domains involved in silicon commercialization; make difficult trade-offs among time to market, production readiness, and performance targets; and present executives with concise options and recommendations. Proven track record driving execution in hyperscale or data-center server products.
Key Responsibilities
Develop an intimate understanding of the product’s architecture, design, operating principles, and performance, power, and thermal (PnP) targets. Apply this knowledge to guide post-silicon validation, debug,