Applications Engineer - ICV Runset Development

Descriptions & Requirements

Job Description and Requirements

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent years in the trenches of physical verification, debugging LVS mismatches at 2 a.m. and hunting down obscure DRC violations that block tapeout. The difference between a runset that works and one that causes three weeks of respins is something you understand viscerally, and you are the engineer who catches the edge case before it becomes a customer escalation. You are fluent in the language of foundries, process nodes, and design rules. When a new technology node drops, you do not wait for perfect documentation. You dig into the specs, write test cases, script your way through qualification, and deliver a working rule deck while others are still scheduling kickoff meetings. Perl, Tcl, and Python are not just tools for you, they are how you turn repetitive manual work into reliable automation. Mentorship matters to you. You have seen junior engineers struggle with the same problems you solved years ago, and you take the time to walk them through it, not just hand them the answer. When a customer calls with a complex layout issue, you can translate their panic into a structured debug plan and explain the root cause in a way that makes sense to both the designer and the FAE. At Synopsys, you will work on IC Validator runsets for the most advanced process nodes in the industry, directly with foundries and customers who depend on what you build.

Develop and validate DRC, LVS, and Fill runsets for IC Validator, targeting advanced semiconductor process nodes from 7nm to 3nm and beyond Work directly with foundry partners to translate process design kits and manufacturing requirements into production-ready rule decks Automate runset qualification workflows using Perl, Tcl, and Python, reducing manual verification cycles and improving consistency across releases Debug complex layout verification failures, including LVS topology mismatches, DRC false positives, and DFM rule interactions that block customer tapeouts Interface with customers and field application engineers to gather requirements, reproduce issues, and deliver technical solutions that keep their projects on track Mentor junior engineers on PV best practices, IC Validator capabilities, and effective debugging techniques Track competitive EDA tools like Calibre and Pegasus, understanding their feature sets and how IC Validator differentiates in the market The Impact You Will Have Enable first-pass silicon success for customers by delivering robust, accurate PV runsets that catch real issues without false noise Accelerate IC Validator adoption at top foundries and design houses, directly contributing to Synopsys revenue and market share in the PV space Reduce customer tapeout delays by providing fast, expert resolution to verification blockers that would otherwise cost weeks of schedule slip Build automation that scales across multiple process nodes and customer engagements, multiplying your impact beyond individual projects Shape the future roadmap of IC Validator by feeding real-world customer pain points and competitive insights back to the product development team Strengthen foundry partnerships through technical excellence and responsiveness, making Synopsys the go-to EDA partner for next-generation process nodes Grow the technical capability of the team by sharing knowledge, creating reusable scripts, and documenting solutions that become team standards What You'll Need B.Tech, M.Tech, or MS in Electronics, VLSI, or related engineering