Senior Staff Engineer Test Engineering
Infineon Technologies
- Location
- Melaka; Andover, MA
- Work model
- On-Site
- Level
- Staff
- Posted
- 2h ago
Skills
About this role
#WeAreIn for jobs that impact everyone's life. What if your ideas could change the way the world connects, powers up, or thinks? As a Senior Staff Engineer Test Engineering in our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in? Your role Key responsibilities in your new role Develop ATE test packages for wafer probe, final test production, and product characterization of Infineon AI power management products. Define test requirements, develop test concepts, prepare test plans, and establish test methods. Collaborate with design and concept engineers to incorporate Design-for-Test (DfT) features into new products to ensure quality and cost-effective testing. Participate in firmware development for test applications, embedded testing, data processing, and Built-In Self-Test (BIST) implementation. Develop test hardware using EDA tools, leveraging existing PCB templates and component symbol libraries. Create and debug test programs, convert ATPG test patterns, and integrate them with test equipment and hardware on ATE platforms. Validate, document, and release test packages for volume production, while supporting silicon characterization and qualification activities. Enhance existing test solutions through test method improvements and test platform transfers to reduce cost and improve quality. Work with industrial leaders of ATE to evaluate new test platforms and develop innovative test concepts to optimize test throughput. Your profile Qualifications and skills to help you succeed Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Physics, or Computer Engineering. Minimum 5 years of experience in developing production test solutions for mixed-signal ICs or modules using ATE. Strong knowledge of electronic engineering principles, including analog and digital circuits, power devices, and high-speed signal integrity. Experience in PCB design using schematic capture tools such as Cadence Allegro. Proficient in test programming using C/C++, Java, Visual Basic, embedded programming, LabVIEW, and scripting languages. Working experience with Advantest V93K, Teradyne ETS systems, or System Level Testers (SLT) is highly desirable. Knowledge of Design for Testability (DfT), Design for Manufacturability (DfM), Built-In Self-Test (BIST), and test firmware development. Ability to collaborate effectively with design and product engineering teams to ensure DfT requirements are understood, specified, and validated during early development stages. Hands-on experience performing electrical measurements using signal generators, oscilloscopes, and spectrum analyzers, including bench test automation. Knowledge of digital and analog IC design environments, pattern generation, and pattern verification is an added advantage. Demonstrated problem-solving, communication, and teamwork skills. #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity. Our hiring decisions are based on skills and experience. Even if you don't meet every requirement, we encourage you to apply. Please let your recruiter know if you need any accommodations during the interview process. Learn more about our