Analog Design, Engineer

Descriptions & Requirements

Job Description and Requirements

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent time designing analog circuits that actually have to work in production silicon, not just pass simulation corners. The difference between a circuit that meets spec and one that fails in the field is usually a layout effect or reliability constraint someone missed, and you are the kind of engineer who catches those things before tapeout . You think in tradeoffs: power versus area, speed versus noise, matching versus complexity. When a SERDES block isn't meeting jitter spec or a DDR circuit is burning too much current, you don't just tweak parameters, you understand the physics and fix the root cause. You are comfortable sitting with a layout engineer talking about matching constraints one hour and presenting simulation results to a product team the next. Minimal supervision doesn't scare you, it energizes you. You ask the right questions, run the experiments that matter, and move designs forward without waiting for perfect information. At Synopsys, you will work on analog IP that ships in real products, and the circuits you design will be reused across customer chips for years.

Design and develop analog building blocks for SERDES, DDR, and memory IP, including PLLs, bandgaps, regulators, comparators, and bias circuits Run simulations across process, voltage, and temperature corners to verify performance, reliability, and margin against spec Identify and refine circuit topologies to hit power, area, and performance targets without compromising robustness Work directly with layout engineers to ensure designs account for matching, proximity effects, electromigration, IR drop, and aging Conduct design reviews with senior engineers and product teams, defending your choices and incorporating feedback Contribute to design methodology improvements, whether that's updating simulation flows, refining checklists, or documenting lessons learned from previous tapeouts The Impact You Will Have Your analog blocks will ship in high-performance IP used by semiconductor companies building everything from AI accelerators to automotive SOCs The power and area optimizations you drive will directly affect the competitiveness of Synopsys IP in customer evaluations and design wins Your attention to reliability and layout effects will reduce respins and field failures, saving engineering time and protecting Synopsys reputation The technical guidance you provide to junior engineers will raise the quality and consistency of the entire analog design team Your collaboration with product and layout teams will ensure designs integrate cleanly into complex SOCs and meet aggressive delivery schedules The design methodologies you help refine will improve efficiency and quality across future IP development cycles What You'll Need Bachelor's or Master's in Electrical Engineering or related field with a strong foundation in analog circuit design Hands-on experience designing analog circuits for SERDES, DDR, memory, or similar high-speed or mixed-signal applications Proficiency with industry-standard CAD tools for schematic capture, simulation, and corner analysis, tools like Cadence Virtuoso, HSPICE, or Spectre Solid understanding of design for reliability including electromigration, IR drop, aging effects, and how they constrain circuit choices Knowledge of layout effects such as matching requirements, proximity effects, and parasitic extraction, with experience collaborating closely with layout engineers or doing layout yourself