SerDes System Design Engineer

Descriptions & Requirements

Job Description and Requirements

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent your academic career and early professional years building an understanding on different aspects of either analog or digital design and have curiosity of how high-speed communication systems actually work, not just in theory but in the messy reality where channel loss, jitter, non linearities, DSP sizing, LMS convergence and impedance mismatches determine whether a link closes or fails. You strive for holistic understanding of complex systems and you believe the way to create at optimized product is to capture the interaction between analog circuits, digital logic, and algorithms in a single coherent simulation environment. Collaboration comes naturally to you. When a model behaves differently than the circuit description suggests you hunt for the truth. You sit with the analog designer who owns the amplifier block, understand the frequency response trade-offs, and update your MATLAB representation until it reflects reality. You are comfortable presenting technical results in gate reviews and defending your sign-off decisions when someone questions your assumptions. You care about closing the loop between simulation and silicon. When lab measurements do not match your predictions, you treat it as a puzzle and get into the lab to solve it. At Synopsys, you will work on leading edge SerDes IP that powers PCIe and Ethernet interfaces across the semiconductor industry.

Build and update MATLAB models of SerDes analog and DSP blocks in cooperation with the system architect, translating circuit designs into accurate system-level representations Own system sign-off and performance evaluation for SerDes products, presenting results in gate reviews and carrying the outcome into successful product releases Challenge and update models to close simulation-to-silicon correlation, working directly with the post-silicon validation team to understand lab data and refine predictions Work with analog and digital engineers to assess how block and algorithm choices affect link quality and system performance across the signal chain Check algorithm behavior against Ethernet and PCIe specifications, ensuring product operation aligns with compliance requirements Develop new algorithms required for product operation or performance improvements, translating system-level needs into implementable solutions Script and automate simulation runs, including AI-assisted flows, to improve efficiency and enable faster design iteration Support lab-data analysis and debug on existing products, helping validation teams understand performance issues and root causes The Impact You Will Have Ensure SerDes IP meets performance targets before release, reducing risk of costly silicon respins and delays Provide the holistic system view that brings analog, digital, firmware, and validation disciplines into a unified understanding of product performance Shape next-generation SerDes architectures by identifying performance bottlenecks and optimization opportunities early in the design cycle Improve simulation-to-silicon correlation across the product portfolio, making future development cycles faster and more predictable Enable successful product releases by catching specification compliance issues and performance gaps before tapeout Influence how high-speed interfaces perform in networking, AI, and data center applications used by customers worldwide Act as the technical integration point where contributions from multiple engineering teams are