Senior Standard Cell Library Engineer

Job Description: About the Organization   Intel's Foundry Standard Cell team is seeking a talented and motivated Senior Design Engineer  to join our growing team . In this role, you will design leading edge experiments to develop, characterize , and test standard cells . You will play a critical role in enabling customer s by listening to their needs and building the solutions .

Defines, implements, characterizes, and validates design solutions to meet design requirements for power, performance, area (PPA), manufacturability, and cost.    Capable of implementing all aspects of the physical design flow, including standard cell circuit, layout, extraction, characterization, and optimization of timing, congestion, power, signal integrity, and reliability to achieve goals.    Collaborates closely with all standard cell collateral to understand design requirements and develop robust implementation and validation strategies.    Reviews and validate s work to ensur e compliance with design, manufacturing, and quality requirements.    Fast turn-around experiments - devising experiments, running them end to end, and guiding data driven decisions across multiple audiences (peer working groups, management, and technical leaders).    Run end - to - end flows to generate, validate , and release custom standard cell collateral per on demand requests .   Core Competencies  Strong written and verbal communication skills are required with the ability to tailor the communication based on the audience .

The Minimum qualifications lis ted below are required to be initially considered for this position .  Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Bachelor's degree in : Electrical Engineering , Ele ctroni cs Engin eering, N anos cience , M ic r o elec tro nics, Computer Engineering , or a STEM related field .   2+ years' experience in one or more of the following:  Standard cell layout  Standard cell abstract modeling  Standard cell characterization  ASIC design and verification  Experience using one or more of the following tools: Cadence Virtuoso, Synopsys Custom Compiler, Cadence Abstract Generator, Synopsys PrimeLib, Cadence Liberate, Synopsys Fusion Compiler, Cadence Innovus, Cadence Tempus, Synopsys PrimeTime, Synopsys HSpice, Synopsys StarRC, Synopsys ICV, Cadence Pegasus, Siemens Calibre.

Post Graduate Degree in : Electrical Engineering , Ele ctroni cs Engin eering, N anos cience , M ic r o elec tro nics, Computer Engineering , or a STEM related field .   Unix proficiency and basic software skills using command line languages ( csh , bash, perl , python) are highly valued.     We are looking for innovative thinkers ready to make an impact in the evolving semiconductor landscape. Apply today and be part of Intel's mission to create technologies that connect and enrich lives globally.            Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, California, Folsom Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It