Layout Engineer
Texas Instruments
- Location
- Bengaluru, Karnataka, India
- Work model
- On-Site
- Level
- Mid
- H-1B history
- 51 approvals (FY2023)
- Posted
- Aug 24, 2026
About this role
Roles and responsibilities
Frame the layout schedule, effort estimation, risk and mitigation plan of layout activities for all layout engineers in the project Work closely with designers to understand the architecture and key requirements for the IC Strike right balance of area, performance and schedule during layout development by collaborating with design, packaging and process teams Work closely with Process development team to carry out PDK, P-cell and Design rule updates Work closely with Packaging engineer to develop custom lead-frames for various packages Analysis and closure of Electro Migration, Thermal gradients, ESD/LU performance and layout parasitic Routinely develop test vehicles for new process & package technology development Mentor and guide junior layout engineers/contract engineers, review their work and provide feedback to meet the quality and schedule norms Responsible for the final layout which meets the design expectations and layout checklist. Identify improvements needed in process/ quality/ cycle time and take up necessary initiatives