Ph.D. Intern - AI/ML & Design Automation

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact Marvell is building the silicon that makes AI possible — the custom XPUs, the 224G and 448G SerDes, the Silicon Photonics interconnects, the co-packaged optics platforms that hyperscalers depend on to train and deploy the world's most advanced models. Designing that silicon at the pace and complexity the AI era demands requires more than engineering talent. It requires intelligence applied to the design process itself. Marvell's AI and machine learning teams are working on exactly that — using AI to accelerate how silicon is designed, verified, and deployed, and building the enterprise AI infrastructure that makes Marvell's engineering organization faster and smarter at every level. This Ph.D. intern pool spans two distinct but connected tracks. The first is hardware-focused: applying ML and AI techniques directly to chip design challenges — EDA automation, design space exploration, predictive modeling for timing and power, and AI-driven approaches to physical design and verification at advanced process nodes. The second is enterprise-focused: building and deploying the internal AI tools and platforms — including large language model integrations, agentic workflows, and AI-assisted engineering systems — that Marvell's global engineering teams use every day. Both tracks sit at the frontier of what applied AI research looks like in a production semiconductor environment, and both are grounded in problems that do not yet have off-the-shelf solutions. Marvell's Ph.D. Intern Program places doctoral candidates directly inside these active efforts, working on problems that are inseparable from their academic research. The work done here is the applied dimension of doctoral research in machine learning, computer science, and electrical engineering — conducted at production scale, on real design data, with real consequences for the silicon that ships to the world's largest AI infrastructure operators. What you will take away is something no coursework or academic dataset can replicate: the experience of deploying your research inside one of the most complex engineering environments in the semiconductor industry. What You Can Expect Track 1 — AI/ML for Hardware & Chip Design As our Ph.D. AI/ML Intern on the hardware track, every day you will apply machine learning research to real chip design problems across Marvell's advanced silicon development flow. Specifically, you can expect to: Develop and apply ML models — including graph neural networks, reinforcement learning, and generative approaches — to chip design tasks such as placement, routing, timing closure, power estimation, and design rule checking Work directly with production EDA tool flows and real design data from active tapeouts in 3nm and 2nm FinFET and Gate-All-Around processes Build predictive models that reduce design iteration cycles and improve first-pass silicon success rates Collaborate with analog, digital, and physical design engineers to identify high-value automation targets and validate model outputs against ground-truth silicon results Present research findings and model performance to engineering leadership and contribute to internal technical documentation Track 2 — Enterprise AI Tools & Implementation As our Ph.D. AI/ML Intern on the enterprise tools track, every day you will work on the deployment and integration of large language models and agentic AI systems