Distinguished Engineer, Switch Architect

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact Marvell’s Cloud Data Center Group designs and delivers the advanced interconnect architectures that serve as the backbone of modern computing. Within this group, the Teralynx Switch Architecture Team defines the architecture of Marvell’s future-forward switch ASICs—solutions engineered for hyperscale cloud environments, massive east-west traffic, and the unique challenges of AI workloads. This team shapes product definition, behavioral modeling, device performance modeling, and architectural validation. We work at the bleeding edge of semiconductor innovation, influencing industry standards and enabling the compute fabrics of tomorrow. What You Can Expect Why Marvell •    Work at the center of AI-driven semiconductor innovation, shaping architectures that industry leaders will rely on for the next decade. •    Influence standards and ecosystems that define where the industry is going—not just where it is. •    Collaborate with high-caliber engineering peers solving some of the largest-scale data networking challenges on earth. •    Thrive in an environment where ideas are explored deeply, innovation is rewarded, and technical excellence drives impact. As a Distinguished Engineer , you will be one of the most influential technical minds in Marvell’s switch strategy. You will own major architectural decisions that directly impact how hyperscale operators and AI clusters connect, scale, and evolve. Your work will help guide the future direction of Marvell technology—delivering breakthroughs in performance, efficiency, and scalability that shape entire markets. What You Can Expect Define architecture for Marvell’s next-generation AI networking switch ASICs  designed for hyperscale cloud and ML/AI-driven workloads. Anticipate and analyze emerging technology trends, influencing long-term roadmap and architectural direction. Contribute to the development of industry standards including  Ultra Ethernet  and Ultra Accelerator Link (UAL) . Create and maintain architectural and performance models to evaluate trade-offs in latency, power, bandwidth, and scalability. Collaborate with silicon, software, systems, and product teams to drive holistic architectural alignment. Document architecture concepts, specifications, performance analyses, and modeling methodologies. Represent Marvell in standards bodies, research consortiums, and strategic customer discussions. Provide architectural mentorship and leadership to engineering teams across the organization.

BS with 15+ years , MS with 10+ years , or PhD with 8+ years  in Electrical Engineering, Computer Engineering, Computer Science, or related field. Extensive experience defining and architecting large-scale ASICs  and complex networking semiconductor architectures. Technical Expertise Deep architectural understanding of: High-speed interconnects and Ethernet protocols Traffic management architectures and packet processing Scaling networks in AI training and inference fabrics Proven hands-on experience with performance modeling , simulation, and architectural trade-off analysis. Proficiency in C/C++ , Python , and modeling environments. Experience contributing to or leading standards development is highly valued. Leadership & Influence Strong conceptual thinking and architectural innovation capabilities. Collaborative leadership style;