Sys/Test Validation Engineer
AMD
- Location
- Shanghai, China
- Employment
- Full Time
- Work model
- On-Site
- Level
- Mid
- Posted
- 2h ago
Skills
About this role
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.
THE ROLE
This technical role is for Client Sensor Fusion Hub (SFH) solution FET (Feature Enablement Team) leader. The individual will be responsible for SFH solution enablement and successful delivery on AMD client APU products. SFH (Sensor Fusion Hub) is AMD's on-die low-power MCU sub-system that manages and intelligently fuses data from multiple sensors — motion (accelerometer, gyroscope, magnetometer), environmental (ambient light, ambient color) and human presence detection — to deliver a holistic, always-on awareness of the platform and user context. The individual will primarily collaborate with cross-functional teams including SFH FW / driver, BIOS, IP, PMF/ASM, SW / Validation and OEM teams, driving the solution end-to-end through post-silicon, with pre-silicon involvement where applicable. PMF/ASM integration experience and AI (e.g. on-device AI inference, human-presence-driven experiences, Copilot+ PC AI features) experience are both a good plus. THE PERSON: The person needs to be self-motivated for deliveries and innovation, a quick learner with a strong sense of ownership. Strong problem-resolving mindset, cross-team driving capability and good communication skills are essential for this leadership role.
KEY RESPONSIBILITIES
Drive post-silicon Sensor Fusion Hub (SFH) solution enablement from bring-up to product for AMD's newest client APU products. Work with cross-functional teams to deliver high-quality solutions covering sensor functionality, accuracy, power, performance and stability. Predict execution risks and provide mitigation plans. As the FET (Feature Enablement Team) leader, drive solution delivery across IP, BIOS, SFH FW, driver and OEM customer engagements. Pre-Silicon: SFH sensor feature list and BU functional test plan development (accelerometer, gyrometer, magnetometer, ambient light / color, human presence detect, ToF). Review and approve IP and System validation test plans; coordinate overall platform sensor test coverage and strategy across I2C / I3C interfaces and ACPI power states. Collaborating with emulation team for emulation task to reduce post silicon risks if applies. Post-Silicon: Bring-up and collaborate with cross-functional teams (HW, BIOS, SFH FW, SFH / SFI / SPB-I2C driver, diag, SW, OEM) for sensor enablement and SFH solution delivery. End-to-end debug and drive of SFH / sensor / SFH FW / driver issues as FET leader, owning the issue from triage through closure. Own sensor accuracy and reliability validation using robotic-arm / gyro-table / motion-simulation infrastructure, and drive ACPI stress (S0i3/S3/S4/S5/Reboot/Z-state) and HLK / certification readiness. Customer technical support: engage OEM partners on sensor selection (AVL), calibration, integration, tuning and field issues. Drive platform-level sensor power / responsiveness tuning; partner with PMF/ASM, PPL and P&P attainment teams to leverage sensor context in platform policy.
REQUIRED EXPERIENCE
Knowledge of x86 client computer hardware architecture and APU sub-systems. Strong knowledge of Windows; Linux exposure a plus. Hands-on experience with platform Sensor solutions (e.g. accelerometer, gyroscope, magnetometer, ambient light / color sensor, human presence detection, time-of-flight) — sensor hub / MCU firmware, ACPI / HID integration, sensor driver stack (KMDF / UMDF, SPB-I2C, I3C). Understanding of sensor bus / interface protocols (I2C,