Package Architecture Analyst
Intel
- Location
- US Oregon Hillsboro
- Work model
- On-Site
- Level
- Mid
- H-1B history
- 1,112 approvals (FY2023)
- Posted
- Sep 4, 2026
About this role
Job Details
Job Description: As a Silicon Packaging Architect, you will play a pivotal role in designing and driving end-to-end package solutions that meet physical, electrical, and cost requirements while ensuring high-quality output. You will oversee the complete packaging development process, from design through production readiness, resolving technical challenges and delivering innovative, cost-effective solutions. Your expertise in package architecture will contribute directly to Intel's success by enabling seamless integration of silicon and hardware technologies. Business group You will be part of a dynamic organization focused on delivering cutting-edge packaging solutions that align with Intel's broader innovation goals. This team works collaboratively across silicon, hardware, and manufacturing domains to ensure that Intel's products meet stringent performance, reliability, and quality standards. Together, the group contributes to Intel's leadership in advanced semiconductor packaging technologies, enabling the creation of world-class products.
Key Responsibilities
Translate product requirements into detailed package architecture specifications. Lead technology trade-off decisions ensuring packaging solutions meet electrical, mechanical, thermal, and reliability standards. Collaborate with silicon, hardware, and package leads to deliver high-quality package outputs and address roadblocks. Oversee the packaging development process, including design, processes, and procedures, while driving continuous improvement in packaging quality standards. Apply expertise in troubleshooting package designs, resolving technical issues, and delivering innovative, cost-effective solutions. Partner with manufacturing teams to ensure seamless design-to-production transitions and support tape-out readiness. Utilize Design for Manufacturing (DFM) principles to optimize package designs for manufacturability and production efficiency. Maintain and refine technical documentation to support package development processes. Behavioral traits Excellent analytical, communication, and problem-solving skills to influence and drive results effectively. Collaborate cross-functionally with diverse teams in silicon, hardware, and manufacturing domains.
Qualifications
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
Bachelor's degree Mechanical Engineering, Electrical Engineering, Materials Science or related field with 9+ years of hands-on experience OR a Master's degree in a relevant field with 6+ years of hands-on experience OR a PhD in a relevant field with 4+ years of hands-on experience 4+ years of experience in: Defining semiconductor/electronic package architectures and developing technical documentation. Experience applying Design for Manufacturing (DFM) principles Utilizing Design of Experiments (DOE) methodologies Troubleshooting package design and manufacturing issues Preferred Qualifications Advanced understanding of semiconductor packaging technologies and industry trends. Experience leading cross-disciplinary teams in a technical environment. We invite you to join us in shaping the future of technology by applying your expertise in cutting-edge packaging solutions. Be part of a dynamic team that thrives on innovation and collaboration, and contribute to creating a lasting impact in the world of semiconductor technology. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations: US, Arizona, Phoenix Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information,