Principal Engineer, Signal Integrity
- Location
- Santa Clara, CA
- Employment
- Full Time
- Work model
- On-Site
- Level
- Principal
- Posted
About this role
About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell is seeking a talented senior-level Signal Integrity Engineer to join our Platform Engineering team, supporting board, switch, and optics development for next-generation platform solutions. This role drives execution across highly complex, cross-functional programs addressing some of the most demanding challenges in AI, wired and wireless communications, and critical infrastructure markets. This role is responsible for definition, analysis, and verification of the system interconnect for high-speed digital systems across board, switch, and optical platforms. You will partner closely with circuit design, applications engineering, packaging technology, and board design teams to define and implement system interconnects that meet internal specifications and customer requirements. You will operate in a highly visible technical environment, providing signal integrity expertise, design guidance, and lab-based validation while engaging with cross-functional engineering teams and customers to ensure platform designs meet performance, quality, and schedule objectives. What You Can Expect Interface with circuit design, applications engineering, packaging technology, and board/switch design teams to define and implement system interconnect that meets internal specifications and customer requirements across board, switch, and optics platforms Own deliverables including timing assessment, bump/RDL and package ballout specifications, and reference routing guidelines for package, board, and customer design guidelines Lead signal integrity delivery simulations using SI/PI tools, and conduct lab debug and measurement to correlate simulation results with real-world performance Support optics integration by evaluating optical interconnect signal paths and ensuring signal integrity across board-to-module and module-to-switch interfaces Develop SI/PI methodologies, rules, and workflows to meet platform-level specifications across high-speed traces and critical power domains Own required steps supporting SI/PI including package and PCB model generation, analysis, simulation, measurement, and correlation, while providing customer support on board designs Work closely with packaging, board layout, and switch architecture teams in defining SI/PI specifications, reviewing designs, and providing feedback for improvements Provide customer-facing SI/PI specifications and ongoing support for customer board design reviews and analysis Mentor junior engineers in developing their SI/PI skills and provide technical guidance Proactively identify signal integrity risks across the platform stack, develop mitigation strategies, and escalate issues as needed to drive resolution What We're Looking For Bachelor's degree in Electrical Engineering or related field and 10-15 years of related professional experience; Master's degree and/or PhD in Electrical Engineering or related field with 5-10 years of experience Strong understanding of EM fundamentals, transmission line theory, via structures, high-speed connectors, and complex BGA packages Proficiency in 2D/3D EM simulation tools such as HFSS, Q3D, Sigrity Suite, or ADS, as well as HSPICE Experience with lab equipment such as oscilloscopes, network analyzers, and TDR Hands-on experience across board, switch, and optics platforms, including high-speed PCB layout, package technology, and optical module/interconnect integration