Semiconductor Product Engineer

Fractile was founded in 2022 on the bet that, eventually, the world’s most capable AI systems would be limited in their impact by the time taken to produce useful outputs. We bet everything on the logical conclusion: that the only way to truly unlock this latent value, to make speed viable at scale, was to radically reinvent the hardware that we run our frontier AI models on. Ever since, we have been building chips and systems that tackle this problem: how to efficiently generate output at thousands of tokens per second, while handling the complexity and capacity challenges of operating large models at very long contexts.

The workloads that push to the limits of the current frontier are already transformational; it is the technical and economic limits on inference speed that are constraining progress. The defining work of the 21st century will be marked by the engine of inference delivering immense and diffuse chains of intellectual inquiry, in drug discovery, in software engineering, in materials discovery, in any field where progress is driven by deep reasoning and intelligence to resolve complex problems.

We are seeking an experienced Semiconductor Test and Product Engineer to be involved in the development, deployment and support of outsourced manufacturing test solutions for next-generation AI accelerator devices. This role spans the full silicon lifecycle from pre-silicon planning and preparation, through first silicon bring-up and NPI to high-volume production. Responsibilities include defining test strategies, developing ATE test content, debugging complex silicon issues, and optimizing yield, coverage, and test cost. They will work closely with the UK-based test development and DFT teams to ensure robust, scalable production of high-performance compute silicon.

• Develop, deploy and maintain ATE test programs for high-volume manufacturing of AI accelerator chips and pre-silicon test vehicles

• Implement manufacturing test content for advanced CMOS designs including high-speed logic, SRAM, DRAM, and high speed IO blocks.

• Develop and debug structural and functional test content such as scan/ATPG, LBIST, MBIST, JTAG, and HSIO tests.

• Bring up first silicon on ATE, including pattern