Principal EDA R&D Engineer, Advanced Packaging

Descriptions & Requirements

Job Description and Requirements

Principal EDA R&D Engineer, Advanced Packaging We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have built a career at the intersection of package substrate design and EDA tool development, and you understand that advancing the field requires more than incremental feature improvements. It requires rethinking the underlying technical approach. You are the engineer who can engage in substantive technical discussions with foundry partners and assembly and test companies about DRC constraints, PDN topology, and Design Rule Manual implementation, translating those conversations into actionable R&D direction. Your experience spans both the theoretical and the practical. You have developed EDA tools that handle production-scale designs, and you understand computational geometry well enough to anticipate when an algorithm will scale and when it will encounter limitations. You have worked through the details of ODB++ output formats and manufacturing handoff requirements because you know that tools must integrate seamlessly into real-world flows. At this stage in your career, you contribute to technical strategy while maintaining deep hands-on involvement in implementation. You guide less experienced engineers through complex technical decisions, helping them develop the judgment that comes from years of solving hard problems. At Synopsys, you will work on package substrate technology that enables the next generation of semiconductor products, and your technical contributions will influence how the industry approaches these design challenges.

Lead R&D projects that advance the state of the art in package substrate design automation, including auto-routing algorithms, DRC verification engines, power delivery network analysis, and design-for-manufacturing capabilities Drive technical direction for database models that enable schematic-driven layout workflows and support integration across the Synopsys packaging tool suite Develop and optimize EDA software using C++, Python, and TCL to address complex challenges in computational geometry, constraint solving, and physical design automation Collaborate directly with foundries and assembly and test companies to implement emerging substrate technologies, translating their Design Rule Manuals and manufacturing requirements into functional tooling Work with cross-functional teams to define collateral input/output formats, integrate analysis capabilities, and ensure database architectures support increasingly complex designs Provide technical guidance to engineers across the R&D organization, reviewing designs and implementations, and helping the team navigate technical tradeoffs Engage with customers in technical discussions at senior levels, representing Synopsys expertise in substrate design methodology and contributing to product direction The Impact You Will Have Establish technical foundations for next-generation package substrate design tools that will be adopted across the semiconductor industry Enable customers to design substrates for advanced packaging technologies that current tooling cannot adequately support Reduce design cycle time by delivering automation that accurately models the constraints substrate engineers face in production environments Influence product roadmap by translating customer requirements and foundry technology trends into prioritized R&D initiatives Accelerate adoption of new packaging technologies by developing tools that integrate effectively with manufacturing flows and identify