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CPU RTL Design Engineer

Intel

Phoenix, AZFull TimeEntryH-1B sponsor company
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Location
Phoenix, AZ
Employment
Full Time
Work model
On-Site
Level
Entry
H-1B history
1,112 approvals (FY2023)
Posted

About this role

The Role

Join Intel's CPU design team and help develop the processors that power the next generation of computing. As a CPU RTL Design Engineer, you will contribute to the logic design, microarchitecture, and RTL development of Intel processors. You will develop and optimize RTL, validate design functionality through simulation and debug, and work across architecture, verification, physical design, and SoC integration teams to deliver high-quality CPU designs.   This is an opportunity to solve complex engineering problems while building deeper expertise in CPU architecture, microarchitecture, digital logic design, SystemVerilog/Verilog, and power, performance, area, and timing optimization.     What You’ll Do Key responsibilities will include but not limited to: Develop and implement high-quality logic designs for CPU features, ensuring compliance with architecture and microarchitecture specifications. Write and optimize RTL code to meet power, performance, area, and timing goals for physical design implementation. Collaborate with architecture teams to define and refine the microarchitectural features of the CPU. Review verification plans, analyze test results, and resolve failing RTL tests to ensure feature correctness. Document microarchitectural specifications (MAS) for CPU designs. Support system-on-chip (SoC) customers to ensure seamless integration of your CPU designs into larger systems.     Behavioral traits that we are looking for: Problem solving: Uses structured analysis and engineering judgment to diagnose complex design and RTL issues. Collaboration: Works effectively with engineers across architecture, design, verification, physical design, and SoC integration. Communication: Clearly communicates technical concepts, design decisions, tradeoffs, and issues to technical partners. Learning agility: Learns new architectures, methodologies, tools, and design concepts and applies them effectively. Attention to detail: Applies engineering rigor when implementing, reviewing, debugging, and documenting designs. Continuous improvement: Looks for opportunities to improve design quality, engineering efficiency, and development methodologies.   Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life.  See  Intel Benefits  for more details.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.   Note: For information on Intel’s immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information   Minimum Qualifications and Experience :   Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field with 3+ years of relevant experience; OR Master's degree in the same filed with 1+ years of relevant experience; OR PhD in the same field 3+ months of educational experience.   Your experience described above must be in the following: Experience with digital logic design and RTL development. Experience coding in SystemVerilog and/or Verilog. Experience with RTL simulation, functional validation, and/or debugging. Experience with architecture, microarchitecture, or digital design concepts,     Preferred Qualifications and Experience : Experience developing or working from microarchitecture specifications. Experience working with design verification and debugging RTL failures.   Why Join This Team? Be part of a team developing next-generation CPU technology while expanding your expertise in RTL design and CPU microarchitecture. You’ll solve challenging

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