Software Engineer — RISC-V Random Test Generator & Assembler Infrastructure

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary:

You will contribute to a Python-based random test generation (RTG) framework and its companion assembler library that together form the   core of a RISC-V CPU design-verification toolchain. The RTG drives a   JIT-style, simulator- coupled generator that produces ELF binaries   exercising the RVA23.1 ISA — including privileged modes, virtual   memory, interrupts, vector, and cryptography extensions. The   assembler library provides the bit-accurate instruction encoding     layer that the RTG and other tools consume.

Implement new generation objects for RISC-V extensions; common   micro-architectural scenarios; and complex data/control-flow   composable idioms.   Add instruction forms and encodings to the python companion   assembler and verifying bit-level correctness against the RISC-V   ISA spec.   Write and tune generation themes which are knob-driven test   profiles that compose objects to improve RTL coverage.   Work within the privileged-software stack: exception/interrupt   handlers, page-table builders, PMP configuration, and IMSIC programming sequences.    Work with ISS and RTL verification engineers to triage failures,   add targeted regression scenarios, and adjust constraint logic   (register allocators, address-space managers, data fillers).

2–5 years of experience in CPU design verification, ISS   development, or hardware-software co-design.   Solid Python 3 skills; comfort with generator-based coroutines and object- oriented design patterns.    Working knowledge of the RISC-V ISA: instruction encoding formats  ( R/I/S/B/ U/J, compressed, vector), CSR semantics, privilege   levels (M/S/U), and the memory model.   Alternatively, similar knowledge for x86 or ARM.   Familiarity with virtual memory (Sv39/Sv48), PMP, and   trap/interrupt handling.   Exposure to random test generation flows or ISS/RTL co-simulation   is a plus.

Compiler development experience.   Understanding of hypervisor and/or AIA/IMSIC interrupt   architecture.   Familiarity with constraint-propagation libraries. Minimum Qualifications: • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail  disability-accomodations@qualcomm.com  or call Qualcomm's toll-free number found  here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). To all Staffing and Recruiting Agencies :   Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being