Validation/Characterization Engineer

Change the world. Love your job. About the Team This role is in the HVDC datacenter product line where we are working on designing the chips needed for the next generation of AI datacenter power supplies. This is a high visibility and high growth product area. The product line develops both 400V GaN power stages as well as low-voltage synchronous rectifiers. We are looking for a validation engineer that will lead the validation efforts across both the primary-side 400V GaN power stages and the secondary low-voltage synchronous rectifiers, playing a critical part in bringing next-generation AI datacenter power solutions to market. Job Responsibilities As a Validation Engineer, your primary responsibility is to ensure the product meets its specifications as defined in the datasheet and VVCM (validation/verification compliance matrix). Beyond specification compliance, you are responsible for ensuring device functionality is fully characterized and validated across real-world system-level use cases. In order to achieve this, validation engineers design PCB boards and develop automation software to increase coverage and reduce data collection time. You will also work closely with design, systems, and application engineers to drive root cause analysis on failures and influence product improvements based on validation findings. As a member of the HVDC new product development execution team, you will be responsible for validating both the 400V GaN power stages and the low voltage synchronous rectifiers. Validation work will involve the following:

Work with the product definition and design team before device availability to thoroughly understand validation requirements, including device-level and system-level specifications. Define, own, and drive a comprehensive validation test plan and schedule that covers every specification in the VVCM, the datasheet, and required functional tests, ensuring full traceability and on‑time delivery of results. Design and build validation PCBs using Cadence Allegro X that meet high-voltage signal and power integrity requirements for the GaN power stages and high-current requirements for the low-voltage synchronous rectifiers, while leveraging and integrating with existing validation hardware infrastructure. Build reusable, automated test sequences using NI TestStand and LabVIEW to execute the validation plan, collect characterization data across multiple devices and test conditions, and drive execution of all functional tests. Analyze characterization data collected across multiple devices and test conditions against VVCM specifications to assess device compliance, verify that all functional tests have defined pass/fail criteria, and confirm all tests have passed prior to validation sign-off. Drive cross-functional reviews covering validation hardware, test results, and debug findings with stakeholders across design, systems, applications, and test engineering teams. Perform datasheet plot generation; apply statistical analysis (distributions, Cpk, limit capability) to assess spec margins and drive datasheet limit decisions. Investigate unexpected behavior when observed during validation through structured design of experiments (DoE) to narrow down the root cause — whether an error in stimulus, error in hardware, or a suspect on-device circuit block — and drive resolution with the design team. Maintain clear, thorough documentation of validation test plans, test procedures, and debug findings. Author concise validation summaries that include all test results for cross-functional reviews and program records.