Sr Design Readiness Engineer

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities · Lead pre-silicon readiness activities across new DRAM products, including risk assessment, DFMEA preparation, validation planning, and readiness reviews with cross-functional engineering teams. · Partner closely with Design, Verification, Component Validation, Product Engineering, Product Architecture, System Compatibility Group, and Silicon Strategy teams to identify product risks, define validation coverage, and align debug priorities. · Apply strong technical judgment to analyze circuit behavior, silicon data, validation results, failure signatures, and product-level interactions across design, test, and manufacturing flows. · Drive structured investigation and resolution of silicon findings, including root-cause analysis, experiment planning, evidence review, and alignment of mitigation or screen strategies to project milestones. · Influence product readiness decisions by connecting design intent, silicon behavior, validation results, manufacturing constraints, and customer quality expectations. · Mentor engineers, strengthen technical practices, and help capture lessons learned that improve execution, product robustness, and organizational readiness across future DRAM programs. ·Apply AI-enabled ways of working to improve engineering productivity, including use of approved AI tools for technical research, data synthesis, debug planning, experiment tracking, documentation, and communication, while ensuring outputs are reviewed, validated, and governed by sound engineering judgment. Scope, Impact, and Technical Leadership · Serve as a technical leader in bridging design intent, validation execution, silicon learning, and product readiness decisions. · Bring depth in semiconductor device behavior, circuit analysis, validation methodology, signal integrity, product engineering, test, reliability, or new product introduction to improve readiness outcomes. · Develop and guide strategies for silicon debug, screen development, production coverage, margin characterization, and product quality improvement. · Provide clear technical recommendations to cross-functional stakeholders and leadership based on data, engineering evidence, and risk-based decision making. · Help define scalable processes and technical standards that strengthen readiness execution across current and future DRAM products. ·Champion responsible AI adoption within Design Readiness by modeling secure, ethical, human-in-the-loop use of AI tools and by identifying opportunities to streamline workflows, improve technical insight, and scale knowledge across products and teams. Qualifications and Preferred Experience · Advanced technical background in electrical engineering, computer engineering, semiconductor engineering, applied physics, materials science, or a closely related field. PhD, MS, or equivalent depth of industry experience is highly valued. · Strong relevant experience in semiconductor design, DRAM or memory technology, silicon validation, product engineering, device characterization, circuit debug, reliability, test development, or new product introduction. · Demonstrated ability to analyze complex technical problems using silicon data, validation results, schematics, circuit behavior, failure analysis, statistical evidence, and cross-functional input. · Experience leading technical investigations, driving root-cause analysis, defining experiments, and influencing mitigation strategies across design, validation, test, or manufacturing teams. · Strong communication skills with the ability to explain complex technical issues clearly to engineering peers, cross-functional partners, and leadership. · Proven ownership,