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Digital BE PD Implementation Design Engineer 1

Cadence Design Systems

SAN JOSEEntry$88.9k – $165.1k/yrH-1B sponsor company
Sign in to applyVerified 1h ago
Location
SAN JOSE
Work model
On-Site
Level
Entry
Salary
$88.9k – $165.1k/yr
H-1B history
77 approvals (FY2023)
Posted
Aug 13, 2026

Skills

Perl

About this role

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Description

The ideal candidate will be energetic, innovative and enthused with how to help customers, solve their toughest Digital Implementation problems using Cadence  technology. Will drive design activities from customer specification to full design implementations for Cadence Digital IC products.

Key Responsibilities

Provide technical support to Cadence Team leads in the areas of Digital Design Implementation & Signoff including Synthesis, Place and Route, Design Closure, and timing/power signoff Utilize Cadence technologies to meet customer specifications and project schedules Prepare and contribute to technical presentations and product demonstrations Work closely with Technical Leads to drive technical   evaluations/benchmarks   to success Work closely with Technical Leads to enhance Cadence tools and methodologies to meet and exceed customer’s requirements Amend and augment the flow as needed using Tcl and/or other programming skills to meet objectives and improve results/flows Capture best practices and lessons learned from current   evaluations/benchmarks   and utilize to improve efficiency and success rate in next engagements  Provide technical support, when developing business case for process improvement projects. Collaborate and engage with team members to support team and project goals.    Job Requirements Requires a BS or MS with 1-2 years industry related experience in design and EDA   (Digital Implementation/Signoff) Understands ASIC Design implementation process and steps Experience with Place & Route (Innovus, ICC2, Fusion Compiler) Exposure and experience with Synthesis (Genus, RTL Compiler, Design Compiler) Exposure to EDA tools in the IC digital implementation & signoff flows (STA tools) Strong debugging abilities to root cause flow and methodology are required. Automation skills using Perl, Tcl and shell scripting essential  Strong analytical & analysis skills covering   digital implementation is   critical.  Experience working in a fast paced environment with other team members required.  Good communication & presentation skills The annual salary range for California is $88,900 to $165,100. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We’re doing work that matters. Help us solve what others can’t.

Listing verified 1h ago. Applications go through the company's official careers site.

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Digital BE PD Implementation Design Engineer 1 at Cadence Design Systems, SAN JOSE | Yoinka