Mixed-Signal Verification Engineer

Lumai is redefining how the world computes. We are a venture-backed University of Oxford spinout building an AI accelerator for the data centre that uses 3D optical compute, performing the matrix multiplications at the heart of AI inference with light rather than electricity. That approach unlocks speed and scale beyond what silicon allows, at a fraction of the energy. If you want to work on technology that did not exist five years ago, and to see the direct impact of what you build, this is the place. ABOUT LUMAI Founded in 2022 and spun out of the University of Oxford, Lumai uses optical processing to accelerate large language models and other transformer-based AI systems. The team combines expertise in optical computing, machine learning, physics, and silicon. We have raised over $15 million from leading deep-tech investors, have a validated product and real customers, and are scaling fast.

As Lumai's mixed-signal IP grows in scope and complexity, so does the risk of subtle interactions between analog and digital domains slipping through to silicon. As a Mixed-Signal Verification Engineer, you will build and run the AMS verification methodology that catches those issues before tapeout, bridging the gap between analog simulation and digital verification practice. You will develop the testbenches and verification plans that give the team confidence in functional correctness, corner robustness, and analog/digital interface behaviour across our converter, bias/reference, and clocking IP. You will report to the Senior Analog/Mixed-Signal Design Lead and work closely with both analog circuit designers and digital/RTL verification engineers, keeping verification coverage aligned with tapeout risk.

Verification Methodology • Develop and maintain AMS testbenches for mixed-signal blocks using Spectre-AMS or an equivalent AMS simulation environment • Define and execute verification methodology spanning functional, corner (PVT), and statistical (Monte Carlo) verification for analog and mixed-signal IP Modelling and Coverage • Build and maintain behavioural/real-number models of analog blocks to enable efficient mixed-signal and system-level simulation • Own coverage closure for mixed-signal verification, identifying gaps between analog-only and digital-only verification approaches Cross-Team Collaboration • Collaborate with analog designers to translate circuit-level specifications into verifiable testbench assertions and checks • Work with digital/RTL verification engineers to ensure analog/digital interface behaviour (resets, clock domains, calibration handshakes) is verified end-to-end Infrastructure and Sign-Off • Maintain and improve regression infrastructure for mixed-signal verification, including simulation runtime and scripting efficiency • Document verification plans, coverage results, and sign-off criteria for tapeout review WHAT WE'RE LOOKING FOR Must-Have • 4–8 years of mixed-signal or analog verification experience • Hands-on experience with Spectre-AMS or an equivalent AMS simulation environment (e.g. AFS, ADiT, or similar) • Practical experience defining and executing a verification methodology for mixed-signal blocks, including corner and statistical verification • Comfortable building behavioural or real-number models of analog circuits for use in mixed-signal or system-level simulation • Strong scripting skills (Python, Perl, or similar) for testbench automation and regression management • Ability to work across the analog/digital boundary, communicating effectively with both analog designers and digital verification engineers Strong Preference For • Experience with UVM-based or UVM-MS (mixed-signal) verification methodology • Familiarity with data converter or PLL/clocking verification specifically • Experience verifying calibration algorithm interfaces between analog and digital domains • Exposure to formal or assertion-based