ASIC Researcher with AI Focus

Join our Team 
 About the Opportunity We are establishing a new AI-driven Digital ASIC research activity inside Ericsson Research. Our research thesis is that AI-driven design methodology is mandatory from day one — and that we drive the evolution of those tools rather than wait for it. The methodology itself is a research deliverable.  This is a single-tier contributor role. Everyone works on the shared research threads, participates in challenge, and contributes to delivery. What differentiates contributors is the expert area(s) each of us brings to the team — the deep technical specialism that anchors our personal contribution.   What You Will Do - Drive the AI-driven methodology research deliverable: characterized AI-driven design flow, quantified PPA / lead-time / closure-effort deltas vs. a controlled traditional baseline, failure-mode taxonomy of AI-EDA tools, and the methodology playbook. - Apply your expert area(s) inside the threads — both as the depth that makes the research credible, and as the lens through which you characterize AI-driven tooling at your part of the chain. - Contribute to the controlled traditional baseline in your area(s) — without the baseline anchor, the team's PPA and lead-time claims aren't falsifiable. - Co-design across the chain. The boundary between architecture, RTL, verification, physical design, test and packaging is fluid here; contributors are expected to engage beyond their primary area. - Engage with Ericsson's product organizations, tool vendors and external research partners as the work and the rotation calls for it. - Maintain cross-site presence (Lund / Lindholmen). - Contribute openly to the team's culture. - Work on shared research threads — typically 2–3 active at any time. - Take rotating turns on delivery lead and operations.   The Skills You Bring - Genuine enthusiasm for AI-driven design and confidence that AI-assisted methods are the right direction for silicon and systems. - Demonstrated depth in at least one primary expert area, with working competence in one or two adjacent areas, evidenced through tape-outs, open-source contributions, publications, hands-on projects, joint academic roles, or comparable experience. Typical expert areas include: •    Software, SW architecture, SW stack and low-level drivers •    EDA tools and design environment •    CPU architecture, compute architecture, packet routing, accelerators •    DSP, signal chains, hardware-efficient algorithms, AI accelerators •    Verification — model to RTL, RTL to gates, SW emulator •    RTL implementation — model to RTL, RTL to gates •    Physical design — P&R, low power •    ASIC production test •    Packaging, chiplet, integration, interfaces, DC-DC power - Comfort with a peer-led, one-tier research culture: you challenge and accept challenge openly, and align once decisions are made. - Ability to work in a cross-site rhythm (regular remote sessions, periodic co-location, strong async collaboration). - Strong curiosity and rigour, treating methodology evolution as part of the research, and willingness to work beyond your core discipline when the problem demands it.   Deadline: 18.09.2026 Why join Ericsson? At Ericsson, you´ll have an outstanding opportunity. The chance to use your skills and imagination to push the boundaries of what´s possible. To build solutions never seen before to some of the world’s toughest problems. You´ll be challenged, but you won’t be alone. You´ll be joining a team of diverse innovators, all driven to go beyond the status quo to craft what comes next.   What happens once you apply? Click Here to find all you need to know about what our typical hiring process looks like.Encouraging a diverse and inclusive organization is core to our values at Ericsson, that's why we champion it in everything we do. We truly believe that by collaborating with people with different experiences we drive innovation, which is