Analog Layout Intern

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Storage, Security, and Networking. You’ll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects. The successful candidate will be self-motivated, willing to learn exciting new technologies, and be able to work effectively within a talented group of individuals. You will gain exposure to a variety of IC design engineering skills and tools during your internship. The Internship would be for a duration of up to 6 months and will take place in our Pavia office. What You Can Expect Learn the use of all the different IC layout development CAD and physical verification tools. Train on Mask/layout design using Cadence Virtuoso EXL/Custom Compiler Synopsys using circuit design as input. Learn design rules of advanced CMOS technology nodes (16nm to 3nm). Run DRC/LVS checks. Learn Electromigration/IR drop (EMIR) concepts for analog IC layout. Optimize layout designs in terms of area and parasitic R,C. Work with team and collaborate effectively with people for effective outcomes. Have routine meetings with your technical mentor when you have questions, as well as the layout team and the project team where you may have to speak to the entire group and update them about your progress. You may have to present a particular issue or solution you’ve encountered. We are developing brand new cutting-edge technologies here, so we learn new things frequently and share with our colleagues.

Student of Electronics or a similar technical field, enrolled at an accredited Italian university OR a Bachelor/Master graduate. Must have a fundamental understanding of base electronic concepts, likely acquired through a degree in Electronics Engineering (graduate or undergraduate) or similar technical field. Having some specialized coursework in analog design or layout, either as part of your Electronic Engineering degree, summer courses, or conference courses, is a valuable skill. Must understand circuit elements like diode, transistor, capacitor, and resistor—basic digital fundamentals: latches, flip-flops, and combinatorial logic. Must have excellent communication skills to give status updates to your team, present to global teams in different time zones, and share information with various levels of personnel at Marvell. Must have fluency in English and enough Italian. Must be eligible to work in the country of hire without restrictions. 
This role is classified as Impiegato under the Contratto Collettivo Nazionale di Lavoro per i dipendenti di aziende del terziario della distribuzione e dei Servizi. Marvell is committed to equal employment opportunity and workforce inclusion. Applications from qualified candidates with disabilities and individuals belonging to protected categories under Italian Law 68/99 are encouraged to apply.

This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's