Staff R&D Engineer (C++)

Descriptions & Requirements

Job Description and Requirements

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You are a highly skilled R&D engineer who is energized by working deep in the core internals of a large, mission-critical EDA product. You take pride in writing robust, performant, and maintainable C++ on UNIX/Linux, leveraging modern IDEs and AI-assisted developer environments to accelerate development . You have a deep appreciation for the data structures, memory layouts, and algorithmic choices that determine whether a tool scales gracefully to billion-gate designs and enjoy reasoning about netlist representations, graph traversals, hashing strategies, and the subtle trade-offs between runtime, memory footprint, and capacity. You communicate clearly and employ a methodical approach to solving complex problems. You see software craftsmanship — clean interfaces, disciplined testing, and measurable improvements — as the foundation of long-term product health.

Architect, develop, and own core infrastructure of the Formalityverificationengine. Drive runtime, memory, and capacity improvements profiling production designs and re-engineering hotspots to deliver step-function gains. Design and hardenparallelarchitecturesto scale equivalence checkingtomodernmulti-core machines. Take end-to-end technical ownership of complex customer escalations rooted in layers — reproducing, root-causing, fixing, and adding the safeguards that prevent regression. Initiatedesign reviews, raise the bar on code quality and unit-test coverage. Collaborate across teams to enable the abstractions needed for future capabilities. The Impact You Will Have Define the structural and performance ceiling of Formality, directly enabling our customers to sign off larger and more complex designs with confidence. Strengthen the long-term architectural foundation of a flagship Synopsys product trusted across every major semiconductor company. Influence the technical direction of the team through design leadership, mentorship, and a strong example of engineering rigor. Help accelerate the tape-out cycles of the chips that power AI, mobile, automotive, and high-performance computing worldwide.

BE/B.Techin Computer Science, Electrical, or Electronics Engineering with strong relevant experience, or an MS / PhD in a related discipline. 5+ years (BE/B.Tech),3+ years (MS), or 2+ years (PhD) of professional software development experience in large, production C++ codebases, with demonstrated module ownership and technical leadership on non-trivial features. Expert command of modern C++, the STL, templates, and idiomatic memory and lifetime management for performance-sensitive systems. Strong fundamentals in data structures and algorithms — graphs, hash tables, trees, traversal andBDD— with a track record of applying them to real engineering problems. Demonstrated ability to profile, diagnose, and optimize for runtime, memory, and scalability on multi-million-instance workloads. Working knowledge of HDLs (Verilog /SystemVerilog/ VHDL) and digital design fundamentals; familiarity with synthesis, equivalence checking, or related EDA flows is strongly preferred. Comfort with TCL, Python, and shell scripting for tool infrastructure, regressions, and developer tooling. Exposure to AI-assisted developer tools such as Cursor or GitHub Copilot, and a curiosity for adopting modern productivity practices. Excellent written and verbal communication, with the ability to lead technical discussions across teams.

A systems thinker who