Principal Logic Design Engineer
- Location
- Bengaluru, India
- Work model
- On-Site
- Level
- Principal
- H-1B history
- 10 approvals (FY2023)
- Posted
About this role
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
Principal Logic Design Engineer
Experience - 10+ years
Job Summary
We are seeking a Principal Logic Design Engineer with deep expertise in micro-architecture and RTL design to lead the development of complex IPs/subsystems. The candidate will provide technical ownership across architecture, microarchitecture, RTL implementation, integration, and silicon bring-up.
Key Responsibilities
• Lead RTL/microarchitecture development for complex connectivity IP/subsystems.
• Translate specifications and system requirements into robust hardware architecture.
• Design high-performance and scalable logic for controllers/subsystems.
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