Validation Engineer

ADVANCE YOUR CAREER. ADVANCE THE WORLD.  At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.    Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.

We are looking for a dynamic, energetic and passionate technical leader to join our growing datacenter CPU and AI post silicon validation team with expertise in the areas of highspeed IO such as PCI Express, multi-socket, Networking to drive the system validation and debug of AI GPU systems. As a key contributor to the success of AMD’s product, you will be part of a leading team to drive and improve AMD’s abilities to deliver the highest quality, industry-leading technologies to market. The Systems Design Engineering and validation team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

Develop and execute feature enablement and validation test plans for SoC- and system-level SoC features across AMD Server and AI  products in high-speed IO Develop test content for both focus testing as well as system level stress testing of IO domain plus cross product stress testing Exposure to functionally validating, regressing, executing and debugging Networking/IFoE/IB/UAL/Scale up/Scale out or related domains Develop post-silicon validation infrastructure (software, hardware, automation environment, and lab setup) Collaborate with partner organizations to provide root cause analysis for platform issues in a Data center environment. Drive the provide root cause analysis for platform level, SoC logical, performance and BIOS/firmware issues Collaborate with cross-functional teams in developing tools to improve SoC validation and debug Work with cross-functional teams to improve post-silicon validation test strategy, methodology, and process PREFERRED EXPERIENCE:   Deeper domain expertise in areas such as IO interfaces - PCIe, CXL, RAS, Power management drive comprehensive system level test-plan execution Strong understanding of Server platform components, x86 or other complex CPU architectures. Proficiency with Linux and/or Microsoft Operating Systems is a plus. Experience developing validation test-plans, execution and strong debug skills at SoC/Platform level. Participated in silicon bring up and debug, support to internal engineering teams Familiarity with programming / scripting language (C/C++, Python, Perl, ...) Strong networking and relationship-building skills, with the ability to drive effective decision-making across various functions and levels within the organization. Extensive experience with common lab equipment, including protocol/logic analyzers, oscilloscopes, etc.   Extensive experience with board/platform-level debug, including delivery, sequencing, analysis, and optimization  Experience with handling and taking captures using Oscilloscopes, protocol analyzers, and JTAG based Debug Tools. Excellent organizational skills and the ability to prioritize multiple workstreams and meet tight deadlines. Strong networking and relationship-building skills, with the ability to drive effective decision-making across various functions and levels within the organization. Knowledge of pre-silicon environments (Verification, Emulation, Virtual Bring-Up) is a plus. ACADEMIC CREDENTIALS:   BSEE/CSE/CS with 8+ years of experience or MSEE/CSE/CS with 6+ years of experience    LOCATION:  Austin, TX   This role is not eligible for visa sponsorship.   #LI-DMI   Benefits offered are described:  AMD benefits at a glance .   AMD does not