Principal Firmware Engineer

Descriptions & Requirements

Job Description and Requirements

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are Firmware at the boundary between hardware and software is where you have built your career. A single miscalculation can mean the difference between a memory interface that trains cleanly and one that fails in the field, and that reality has shaped how you work. Performance is not just about writing tight code. It is about understanding what the silicon is actually doing when your code runs at boot time. Dropping into RTL waveforms to debug firmware comes naturally to you. So does stepping back to question whether the algorithm itself needs rethinking. Profiling compiled code to find microcode level bottlenecks is the kind of work that keeps you engaged. The hardware is real, the constraints are real, and the problems do not solve themselves with abstractions. Mentoring others matters to you, but so does staying curious about how new modeling techniques might change what is possible. At Synopsys, the memory interface PHYs you work on will power the next generation of DDR, LPDDR, and HBM solutions.

Develop and optimize firmware for DDR, LPDDR, and HBM memory interface PHY training sequences Profile compiled firmware at the instruction level to identify runtime bottlenecks and implement optimizations that improve training performance Analyze RTL waveforms and testchip data in the hardware lab to understand eye margin sensitivity and refine training algorithms Collaborate with firmware architecture to study JEDEC protocol specifications and propose algorithmic improvements to training workflows Debug complex hardware-software interaction issues across firmware, RTL, and physical silicon using lab equipment and simulation tools Explore and prototype how emerging modeling techniques could be applied to memory training workflows Mentor engineers on the team, sharing your knowledge of embedded firmware development, hardware debugging, and memory interface behavior The Impact You Will Have Reduce training runtime for next-generation memory PHYs, directly improving customer time-to-market and system boot performance Improve training robustness and eye margin across process, voltage, and temperature corners, resulting in higher yield and reliability for customer designs Influence the architecture of future PHY training algorithms by bringing fresh perspectives grounded in real hardware behavior Accelerate team capability by mentoring engineers on low-level firmware optimization, RTL debugging, and protocol-level problem solving Enable Synopsys to deliver competitive, high-performance memory IP solutions that meet the demands of AI, HPC, and data center applications Shape the direction of firmware development practices and tooling within the IP Group through your technical leadership Contribute to the successful deployment of memory PHY IP used by leading semiconductor companies worldwide What You'll Need Bachelor's degree in Engineering, Computer Science, or related field with 12+ years of software development experience, Master's with 10+ years, or PhD with 8+ years, all in commercial or production environments Deep proficiency in C for embedded firmware development, including experience optimizing for resource-constrained processors Hands-on experience with RTL waveform analysis and debugging using tools like Verdi, DVE, or similar Demonstrated ability to work at the hardware-software boundary, understanding how firmware interacts with digital logic and physical interfaces Experience profiling and optimizing compiled