Memory IP Design Engineer

Descriptions & Requirements

Job Description and Requirements

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You are passionate early-career engineer eager to make your mark in semiconductor design. With a solid academic background in electronics, electrical, or computer engineering You are someone who has spent the last couple of years working with embedded memory design and you are ready to go deeper. You have worked with SRAM, ROM, or Register Files enough to know that the details matter, that a small circuit decision ripples through characterization, layout, and eventually into silicon. You are comfortable working in Cadence tools, writing scripts when repetitive tasks slow you down, and collaborating across teams. At Synopsys, you will work on memory IP that goes into real products, alongside engineers who will help you grow.

Design and simulate embedded memory circuits including SRAM, ROM, and Register Files using Cadence Virtuoso and related tools. Support layout activities by working with layout engineers to ensure design intent translates cleanly into physical implementation. Run bitcell characterization and basic reliability analysis to validate performance across process, voltage, and temperature corners. Debug circuit-level issues by analyzing simulation results, identifying root causes, and proposing fixes with guidance from senior engineers. Collaborate with CAD, verification, and frontend teams to align on design requirements, timing constraints, and integration needs. Characterize the memory compiler for desired PPA. Use scripting in C-Shell, Perl, or Python to automate repetitive tasks and improve design flow efficiency. The Impact You Will Have Deliver memory IP blocks that meet performance, power, and area targets for high-volume semiconductor products. Reduce design iteration cycles by catching issues early through thorough simulation and analysis. Improve design quality and reliability by contributing to characterization and validation efforts. Enable faster time-to-market for Synopsys customers by supporting robust and well-documented memory solutions. Build reusable design methodologies and scripts that make future projects more efficient. Strengthen cross-functional collaboration by clearly communicating design decisions and technical tradeoffs. Grow into a more senior role by mastering the fundamentals of memory circuit design in a production environment.

Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related technical field. 0 to 2 years of hands-on experience in CMOS circuit design, specifically with embedded memory such as SRAM, ROM, or Register Files. Working knowledge of memory architectures, bitcell design, and circuit fundamentals including read/write operations and sense amplifier behavior. Experience using Cadence Virtuoso or similar tools for schematic capture, simulation, and layout interaction. Exposure to scripting languages like C-Shell, Perl, or Python is a plus and will help you automate workflows and analyze data more effectively.

You can look at a simulation waveform and spot when something is off, even if you do not immediately know why. You ask questions when requirements are unclear instead of guessing and moving forward. You can work on multiple design tasks in parallel without losing track of deadlines or deliverables. You are comfortable learning new tools and methodologies on the job, and you do not wait for someone to tell you every step.

You'll Be Part Of You will join the memory IP design