Sr. Staff Engineer - SoC Architect

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > SoC Architecture General Summary: Research, innovate and provide SoC architecture platforms and solutions for all SoC’s across QCT.  Engage collaboratively across teams and organizational boundaries, including with Hardware design & Verification, Software, Product Management and Product Planning teams to create leading SoC-wide solutions that provide the best-in-class cost, performance, and power.  Develop, model and prototype new system solutions and approaches across functional tech IPs that allow our hardware technologies to be used efficiently and allow our customers to make better use of our hardware.  Conduct hands-on workload analysis including algorithm optimization and analysis of performance and/or power characterizations to help define our SoC architecture solutions.  Deploy simulators, profilers, and hardware solutions to provide quantitative justification for architectural directions.  Efficiently communicate experimental results, review with technical leads and peers, and analyze outstanding issues. Innovate and develop new cross-IP SoC-wide solutions that enable existing and emerging market SoCs to meet their separate, unique product requirements for these technology areas: Power System, Shared Resource Management, Limits/Thermal Management, Hardware Islands, Debug, Safety, ARM Compliance, Exclusive Monitors and Far Atomics, Coherency, Memory Ordering, Memory Management, Virtualization, Control Processors, Signaling, Compression, Streaming, Always-On and system level ML. Minimum Qualifications: •    Bachelor's degree in Electrical Engineering, Computer Science, or related field and 6+ years of Systems Engineering or related work experience. OR Master's degree in Electrical Engineering, Computer Science, or related field and 5+ years of Systems Engineering or related work experience. OR PhD in Electrical Engineering, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. • 2+ years of experience in one or more system architecture technology areas and products (e.g., Power System, Shared Resource Management, Limits/Thermal Management, Hardware Islands).

SOC Architecture and Subsystem architecture deep understanding of one or more subsystems including CPU, GPU, AI Accelerators, Display Controllers, Camera Pre-processor, Infrastructure blocks (DDR, NOC, SMMU etc.) and I/O blocks (PCIe, ETH, CAN, Serial I/O) Ability to work with Subsystem Architects and Design leads to analyze failure modes of Subsystems when safety use cases execute and are mapped to these heterogenous compute subsystems Knowledge of SOC Infrastructure IP functionality including DDR controllers, NOC/Internal SOC interfaces, Power Management Control, BIST Control Knowledge of Safety Feature and Safety Mechanism design (requirements to integration/execution) for high performance, low power SOCs used in ADAS, ADS and IVI systems Prior experience with architecture or design or programming of one or more of common Instruction Set Architectures – x86, ARM, RISC V, MIPS etc. Hands-on experience with applying either ISO26262 or IEC61508 safety standards to complex SOCs for Auto or Industrial Safety applications Systems Safety Architecture experience to breakdown complex system safety use cases to requirement decomposition at SOC, AI Accelerators, DRAM, PMIC, MCU, Sensors etc. Ability to understand SOC and Subsystem level design functionality to analyze safety/failure mode implications of new functions, features added in design. Ability to understand and make appropriate safety recommendations to SOC and HW/SW Design teams when HW/SW/System issues or HW bugs are found during project execution. Prior experience developing, innovating, or optimizing (power/performance/safety) safety features, freedom from interference features at SOC or System Experience developing System and SOC level