Staff Electrical Engineer - Aggregator

Apptronik is a human-centered robotics company developing AI-powered robots to support humanity in every facet of life. Our flagship humanoid robot, Apollo, is built to collaborate thoughtfully with people, starting with critical industries such as manufacturing and logistics, with future applications in healthcare, the home, and beyond.

We operate at the cutting edge of Applied AI, applying our expertise across the full robotics stack to solve some of society's most important problems. You will join a team dedicated to bringing Apollo to market at scale, tackling the complex challenges like safety, commercialization, and mass production to change the world for the better.

We're looking for a Staff Electrical Engineer to architect the electronics for Apollo’s sensor bridge. Strong candidates will have experience with FPGA hardware for both PCBA design and RTL development. This role works closely with the perception team to give Apollo sight and enable critical safety functions. This role owns the full electrical and FPGA stack of one board, end to end: requirements, architecture, schematic capture, layout guidance, RTL, bring-up, validation, and the transition to production.

ESSENTIAL DUTIES AND RESPONSIBILITIES or KEY ACCOUNTABILITIES

• Electronics & FPGA Architect from Concept to Production: Own requirements definition, part selection, schematic capture, layout guidance, and RTL architecture for a multi-Gbps, mixed-signal PCBA that aggregates camera sensor data and human-robot interface functions into an efficient cable interface routed across dynamic joints. Carry the design from architecture through prototype, validation, and manufacturing release. Generate and maintain design documentation: block diagrams, schematics, RTL architecture docs, test plans, and fab/assembly drawings.

• High-Speed & Mixed-Signal Hardware Design: Design and validate high-speed digital interfaces (CSI-2, GMSL2/FPD-Link/PoC, 10GbE) including signal integrity, impedance control, and length-matching. Architect the board's power tree for proper power sequencing and low-power consumption. Design for EMC, ESD, and thermal constraints.

• FPGA Device Selection, Architecture, and RTL Development: Define FPGA device selection and architecture for the sensor bridge node(s). Develop RTL (VHDL/Verilog) for CSI-2 ingest, Ethernet packetization, timestamp/metadata insertion, and camera synchronization for deterministic multi-camera and multi-IMU synchronization. Own timing closure, clock-domain crossing, and resource/power budgeting within the FPGA. Select and integrate high-speed transceivers and external PHYs.

• Validation, Bring-Up, and Debugging: Develop and execute validation plans spanning board-level and FPGA-level testing. Build test fixtures and use lab equipment (high-bandwidth oscilloscopes, protocol analyzers, logic analyzers) to validate latency, bandwidth, and synchronization requirements. Debug across the hardware/RTL boundary — link training failures, timing violations, ISP misconfiguration, power sequencing faults — using rigorous, first-principles root-cause analysis.

• Lifecycle Management & Vendor Alignment: Own the entire component lifecycle through PLM systems, managing third-party relationships with hardware vendors and contract manufacturers (CMs) to ensure successful production scaling and design-for-manufacturability (DFM/DFA).

• Cross-Functional Collaboration: Collaborate closely with cross-functional teams, including technical lead, project managers, software, mechanical, thermal, systems engineers, and manufacturing. Act as a mentor within the electrical engineering team, guiding junior engineers on best practices for hardware design, documentation, and