Silicon Validation Manager

Descriptions & Requirements

Job Description and Requirements

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent years in the lab with oscilloscopes, network analyzers, and test boards that either prove your design works or send you back to the schematic. Managing a validation team is not about standing back and delegating, it is about knowing when a waveform looks wrong, when a debug path is heading into a dead end, and when your team needs air cover to finish the job right. You have debugged enough high-speed SerDes PHYs to know that the hardest problems do not show up in simulation, they show up at 3pm on a Friday when the board is misbehaving and the root cause could be anywhere from the substrate to the test fixture. Leading people energizes you. You know how to manage a mix of analog designers who think in transfer functions and hardware engineers who think in bring-up sequences, and you can translate between those worlds without losing either group. You do not micromanage, but you also do not disappear. When someone is stuck, you ask the right question or point them to the right tool, and when a test plan is missing a corner case, you catch it before it becomes a schedule slip. You have opinions about how validation should be done, and you are not afraid to push back when timelines, resources, or test coverage do not line up with reality. At Synopsys, you will lead a team building and validating some of the highest-speed analog IP in the industry, and what you deliver will directly enable customer success.

Lead a cross-functional Silicon Validation Engineering team that includes analog designers and hardware engineers working on high-speed SerDes PHY validation Oversee silicon bring-up, debug, and characterization in a state-of-the-art test lab with high-speed equipment including oscilloscopes, network analyzers, and custom test boards Review and approve characterization test plans, debug strategies, and detailed test reports that meet project timelines and quality standards Coordinate the design and bring-up of test boards and hardware solutions to support silicon testing, debugging, and performance characterization Mentor team members on debugging techniques, circuit behavior analysis, and professional development, creating a culture of technical rigor and knowledge sharing Work with analog design, product engineering, and IP release teams to align validation milestones with product schedules and customer delivery commitments Drive process improvements in validation workflows, test automation, and lab infrastructure to increase team efficiency and test coverage The Impact You Will Have Enable Synopsys customers to integrate high-speed SerDes IP into their SoCs with confidence, backed by thorough silicon validation and characterization data Reduce time to market for SerDes PHY IP by catching and resolving silicon issues early through disciplined debug and test execution Build a validation team that consistently delivers high-quality test reports, accurate performance data, and actionable insights that feed back into design improvements Strengthen the feedback loop between silicon validation and analog design, ensuring lessons learned in the lab directly improve next-generation IP Expand validation capabilities and lab infrastructure to support increasingly complex high-speed interfaces including NRZ, PAM4, and emerging protocols Mentor engineers who go on to lead validation efforts across Synopsys IP portfolios, raising the technical bar across the organization Contribute to Synopsys Silicon IP's