Senior Staff Manager, Physical Design

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact Built on decades of expertise and execution, Marvell’s custom Processor/ASIC solutions deliver differentiated platforms through a best-in-class portfolio of data infrastructure IP and flexible business models. The Physical Design organization supports these platforms by delivering high-quality implementation across advanced process nodes and complex, high-performance SoCs. As Senior Manager of Physical Design, you will lead physical design execution for assigned projects or subsystems, ensuring reliable delivery, adherence to established methodologies, and close collaboration with global Physical Design teams. You will also focus on team development and strong day-to-day execution to support successful program outcomes. What You Can Expect Job Summary Marvell is seeking a Senior Manager of Physical Design to lead project-level physical design execution and support team growth at the site. This role is responsible for delivering high-quality RTL to GDSII implementation for assigned blocks or subsystems, while coordinating closely with global Physical Design teams and cross-functional partners. The Senior Manager will manage a team of engineers, ensuring strong execution on schedule, quality, and power/performance/area (PPA) targets, while developing team capability and fostering best practices in physical design flows and methodologies. This role emphasizes hands-on leadership, technical depth, and effective collaboration to support complex SoC development in advanced process nodes. Key Responsibilities ·  Lead physical design execution for assigned blocks, subsystems, or projects, managing a team of physical design engineers. ·  Support hiring, onboarding, and day-to-day team management, including performance feedback and career development. ·  Drive RTL to GDSII implementation, including synthesis, floorplanning, place and route, clock tree synthesis, timing closure, power/signal integrity analysis, and physical verification. ·  Ensure on-time, high-quality delivery by tracking schedules, identifying risks early, and executing mitigation plans. ·  Follow and apply established physical design methodologies, flows, and best practices, while providing feedback for continuous improvement. ·  Work closely with cross-functional teams (architecture, RTL, CAD, DFT, timing) to address design and implementation challenges. ·  Collaborate with global PD teams to ensure alignment on execution plans and technical decisions. ·  Escalate risks, issues, and resource gaps to leadership in a timely manner. ·  Provide technical guidance and hands-on support to the team to ensure strong execution and quality. ·  Mentor engineers and contribute to building a high-performing and collaborative team environment.

Required Qualifications ·  Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or a related field. ·  10+ years of experience in ASIC physical design and SoC implementation. ·  Experience leading a team of engineers and driving project-level physical design execution. ·  Proven track record of delivering successful SoC or subsystem tapeouts. ·  Good understanding of physical design methodologies, flows, and advanced process technologies. ·  Proficiency with ASIC design flows and commonly used EDA tools. ·  Strong technical problem-solving skills and effective communication