RTL Performance Analysis Architect

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Join the Bangalore-based Infrastructure IP Performance Modeling, Verification, and Analysis team as an RTL Performance Analysis Architect. As part of the Infrastructure RTL Analysis and Optimization (I-RAO) team and a broader global performance organization, you will influence architecture and design decisions across Snapdragon-based SoCs for mobile, automotive, XR/VR, server, and AI products. The role spans early architectural exploration, microarchitectural analysis, RTL performance correlation, pre-silicon bottleneck identification, design optimization, and production-hardware tuning. You will analyze infrastructure IPs—including memory controllers, emerging compute-in-memory technologies, cache controllers, memory management units (MMUs), PCIe and CXL controllers, compression IPs, and interconnects—and have opportunities to contribute to patents and technical publications.

Characterize representative workloads and use cases to identify performance bottlenecks across CPUs, GPUs, multimedia engines, SMMUs, CXL, networks-on-chip (NoCs), cache controllers, and memory controllers. Collaborate with architecture, design, and modeling teams to evaluate enhancements for next-generation memory controllers, last-level caches, interconnects, and related infrastructure IPs. Analyze power-and-performance (PnP) tradeoffs and propose architectural or microarchitectural improvements that increase efficiency. Define targeted pre-silicon performance analysis strategies and test plans that expose design bottlenecks early. Develop simulation-scale workloads, monitors, and analysis flows for SystemVerilog/UVM-based pre-silicon environments. Core Qualifications Bachelor’s degree in Engineering, Information Systems, Computer Science, or a related field. Strong foundation in computer architecture and microarchitecture, supported by rigorous analytical and problem-solving skills. Two to ten years of experience in digital design, performance analysis, or functional verification. Experience investigating performance and microarchitectural behavior in complex hardware blocks such as memory controllers, CPUs, GPUs, NoCs, or multimedia subsystems. Ability to identify system-level performance bottlenecks, develop evidence-based hypotheses, and communicate actionable recommendations. Proficiency in SystemVerilog/UVM and scripting or automation using Python or Perl. Clear communication and collaboration skills for working effectively with architects, designers, modelers, and verification engineers across global teams.

Demonstrated innovation or technical thought leadership through patents, peer-reviewed publications, or high-impact engineering contributions. Knowledge of memory controllers, LPDDR/DDR protocols, AMBA, Arm architectures, cache coherency, CXL, PCIe, MMUs, compression technologies, or interconnect design. Experience translating system performance use cases into targeted workloads, metrics, and pre-silicon analysis plans. A collaborative mindset, intellectual curiosity, and commitment to technical excellence in a fast-paced engineering environment. Minimum Qualifications: •    Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may