Physical Design Engineer

Annapurna Labs, an Amazon team, designs and delivers high-end, custom silicon at the heart of AWS. Our chips don't just support the cloud — they define it. From Trainium, the purpose-built ML accelerator driving the next wave of AI innovation, to Graviton, the Arm-based server processor redefining price-performance for compute workloads, to Nitro, the advanced network and cloud management controller that underpins every AWS instance — Annapurna's products set the standard for the industry. Founded by industry veterans and operating as a fabless semiconductor company within AWS, Annapurna Labs combines the agility of a startup with the scale of the world's largest cloud provider. Our engineers work with cutting-edge technologies to innovate and shape the future of cloud computing- designing the leading-edge semiconductor products that power Amazon's infrastructure. Here, you'll experience a fast-paced environment with continuous learning opportunities and the chance to develop next-generation platforms. Exciting opportunity to join Amazon in developing its next generation products for the cloud market. We are looking for talented people to join us, as leaders in our excellent Physical Design team, adopting super advanced process nodes, mentoring team members, and further developing our implementation methodologies. Watch these videos to learn more about Annapurna Labs: AWS re:Invent 2025 - Keynote with Peter DeSantis and Dave Brown: https://www.youtube.com/watch?v=JeUpUK0nhC0 AWS re:Invent 2025 - Deep Dive into the AWS Nitro System https://www.youtube.com/watch?v=cD1mNQ9YbeA AWS re:Invent 2025 - AWS Graviton https://www.youtube.com/watch?v=haSHl2BLhm8 Key job responsibilities * Daily involvement in all aspects of physical design chip development (RTL2GDS), including floorplanning, synthesis, clock tree synthesis, place and route, static timing analysis, power and noise analysis, physical verification testing, and equivalence checks. * Being actively engaged in design-backend convergence aspects and defining timing constraints. * Taking full end-to-end responsibility for the physical design of macros and clusters level, according to specifications, under challenging constraints, with focus on optimizing power, area, and performance. * Participation in the development of design flows, using a variety of EDA tools and vendors such as Synopsis and Cadence. * Engaged in defining implementation and signoff methodologies. A day in the life Your day will be filled with dynamic technical challenges that push the boundaries of semiconductor design. You'll collaborate with cross-functional teams, diving deep into intricate physical design processes, and translating complex architectural concepts into tangible technological solutions. Expect to engage in cutting-edge problem-solving that requires both creative thinking and precise technical execution.

We are a passionate group of engineers dedicated to developing revolutionary semiconductor technologies. Our team thrives on innovation, collaboration, and the opportunity to create technologies that will impact global cloud computing infrastructure. We value diverse perspectives and believe that breakthrough innovations emerge from inclusive, supportive environments.