Product Development Engineer

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We are the high-end test engineering team providing test solutions for Data Center Graphics (DCG) New Product Introduction (NPI) under the Product Engineering Organization. We do exciting product development for leading-edge technology that will power the next generation processors used for high performance computing, data centers, enterprise servers, and Artificial Intelligence clusters.   If you are looking for a fulfilling and challenging career as an engineer leading NPI ATE Product Development , you are at the right place! As a (Senior) MTS Product Development Engineer, you will be responsible for developing and driving ATE test solution to meet NPI business milestones and KPI (test time, yield, cost, quality). The expectation is to perform leadership through interaction with design teams, Product & Test Engineering teams, Quality & Reliability teams, software & platform teams to come up with the best solution that balance quality and cost. You will experience working with and learning from AMD’s talented engineering teams around the world.   THE PERSON: We are looking for someone with strong technical, analytical, leadership and problem-solving skills, as well as demonstrating the characteristic of an independent and resourceful individual.   The applicant must have a strong background in Integrated Voltage Regulator (IVR) testing and characterization, with hands-on expertise in Teradyne or Advantest ATE platforms. In this role, you will be responsible for developing and executing test solutions for IVRs used in advanced SoC and power management applications. You will work closely with design, product, and validation teams to ensure robust test coverage, yield optimization, and reliable product performance.

Develop ATE test programs and hardware (load boards, probe cards) for silicon validation, characterization, and production testing of Fuse. Work with Teradyne (UltraFlex, J750) or Advantest (V93000, T2000) platforms to create and debug Fuse test routines. Support test development from pre-silicon validation through high-volume manufacturing ramp. Perform characterization across voltage, temperature, and process corners (PVT) and generate detailed test reports. Collaborate with design and systems engineers to define test specs and translate design intent into test requirements. Automate test data collection and post-processing using tools such as Python, JMP etc. Debug silicon issues and drive root-cause analysis using both ATE and bench-level tools. Support test time optimization, yield improvement, and cost reduction initiatives.

Hands-on experience with on-die or integrated voltage regulators in advanced CMOS nodes. Background in high-volume production testing and test correlation between ATE and bench. Experience with ESD/Latch-up, HTOL, and reliability qualification processes. Familiarity with test hardware design (probe card and load board design/debug). Knowledge of ATE test cost analysis, test time reduction techniques, and test coverage metrics. Proficient in developing and debugging test programs on Teradyne or Advantest ATE platforms. Experience with lab instruments: oscilloscopes, SMUs, electronic loads, network analyzers, etc. Solid scripting and data analysis skills (Python, MATLAB, or equivalent). Familiarity with silicon bring-up, PVT characterization, and yield analysis.